Research Finder
Find by Keyword
Is The Next Space Race About Chips, Not Rockets?
Intel, AMD, and even SpaceX are converging on radiation-hardened AI chips and software fault-tolerance as the real orbital compute race begins
07/19/2026
Key Highlights
- Intel unveiled Starfire, a space-grade system-on-chip that pairs a CPU and NPU built on its 18A process with a GPU tile on the older Intel 3 node, all joined in a single Foveros package aimed at U.S. government satellites and spacecraft.
- Starfire ships in two SKUs, a 10W Low Power part reaching up to 45 TOPS and a 35W Performance part reaching up to 75 TOPS, rated for operation between -55°C and 125°C with a service life exceeding 10 years.
- Radiation qualification (total ionizing dose, single-event latch-up, single-event effects) is still in process, with engineering samples not due until the third quarter of 2026.
- AMD's radiation-tolerant Versal AI Edge Series Gen 2 XQR family targets up to 184 TOPS of AI acceleration and over 500K LUTs of programmable logic, and is already flight-bound for Blue Origin's Mark 2 lunar lander.
- BAE Systems' Endura processor, built on a 45nm GlobalFoundries node, recently completed radiation-hardness testing, evidence that the incumbent rad-hard base is modernizing in parallel rather than standing still.
- Google's Project Suncatcher plans to fly Trillium TPU chips in a satellite constellation, with prototype launches targeted for early 2027, a signal from outside the traditional space-chip supplier base entirely.
- Our take: Intel and AMD are both chasing the same opportunity in orbit from different starting points, and neither has a fully qualified answer yet, this is a race just getting started for both.
The News
Intel introduced Starfire, a radiation-hardened relative of Intel's upcoming Panther Lake architecture, stitched together using Foveros 3D stacking, with the CPU and NPU tiles built on Intel 18A and the GPU tile on the mature Intel 3 process. Intel Government Technologies is handling Starfire, with samples in Q3 2026 and a pitch of market-competitive pricing and domestic manufacturing. Intel lists the radiation data as characterization in process, so the part isn't radiation-qualified yet, and specs are subject to change. The announcement lands as AMD, the incumbent in space-grade adaptive compute, continues expanding its own radiation-tolerant Versal lineup for the same onboard AI workloads. Intel Starfire product page: https://www.intel.com/content/www/us/en/content-details/923451/intel-starfire-built-for-extremes-powered-by-intel.html]
Analyst Take
Space compute has trailed commercial silicon by a decade or more for a defensible reason; space is a hard environment where swapping out faulty parts is not an option. That said, Starfire is the clearest signal yet that both major x86 chipmakers think that gap is closing. The market Starfire is targeting has run on BAE Systems' RAD750 (a part that clocks 110 to 200 MHz on 150nm or 250nm lithography) for two decades. The contrarian read is that 18A in space is closer to marketing than substance, given that the chip is unqualified, samples do not exist before the third quarter, and the underlying node's yields are still maturing by outside analyst accounts. That skepticism has real teeth. But it misreads what Starfire and its AMD counterpart are actually competing for. Neither is trying to out-harden BAE's own newly tested Endura processor, itself built on a decidedly more conservative 45nm node, on legacy terms. Both are betting that AI inference, not flight control, is the next orbital compute bottleneck, and while both are still years from proving it in flight, timelines are accelerating.
What Was Announced
Starfire is architecturally a derivative of Intel's consumer Panther Lake platform, adapted for orbital survivability. The CPU tile carries four performance cores and four low-power efficiency cores on the flagship Intel 18A node. The NPU tile also sits on 18A across three separate tiles, and the GPU tile uses four Xe cores with 64 execution units built on the more mature Intel 3 process. That split matters. Smaller transistors hold less charge per stored bit, which has the potential to make leading-edge silicon more prone to radiation-induced bit flips. Committing 18A to orbit leans on RibbonFET and design-level hardening rather than a mature, inherently more tolerant node. That's why it makes sense that Intel kept the GPU on the older, better-characterized Intel 3 process rather than pushing every tile right to the leading edge. The two SKUs are positioned for different mission profiles, with the Low Power variant reaching up to 45 TOPS and the Performance variant reaching up to 75 TOPS. Both configurations are designed to run Linux-class workloads suited to onboard image processing and sensor fusion rather than the narrow, deterministic control loops that older space processors were built for. Whether Starfire actually survives its qualification gauntlet is, by Intel's own account, still an open question, and we'd treat every performance figure on the sell sheet as provisional until that testing concludes.
Market Analysis
AMD is certainly not standing still while Intel makes its 18A space argument. The Versal AI Edge Series Gen 2 XQR family is designed to offer up to 184 TOPS of AI acceleration for post-processing and data management in space, in a radiation-tolerant, flight-qualified device. AMD's near-term edge is continuity: Blue Origin is using AMD's chips in development flight computers for its Mark 2 lunar lander, and NEC is deploying AMD space-grade SoCs in Japan's first optical communication satellite constellation, both active programs today. An important note, AMD tends to emphasize AI Engine performance, LUT counts, and radiation tolerance over process node leadership in its space-grade messaging. At least so far.
Intel's own heritage in orbit is more current than it might appear. Intel Xeon processors have powered HPE's Spaceborne Computer aboard the ISS continuously since 2017, across multiple hardware generations, using software-based fault management rather than physical radiation hardening. That is an important heritage model built on COTS resilience rather than purpose-built rad-hard silicon. More on that below. Intel Foundry's Trusted Foundry status today also underpins Pentagon programs including RAMP-C and SHIP. What Intel lacks isn't heritage, it's a currently flying adaptive SoC in the way AMD has one today, and Starfire is the vehicle meant to close that gap.
A third player complicates the picture further. Intel's own process technology now reportedly underpins Elon Musk's Terafab project, which includes a radiation-hardened chip family, reported as D3, built for a SpaceX orbital AI satellite constellation. That projected workload is said to consume roughly 80 percent of Terafab's planned output once operational. That would mark a notable entrant from entirely outside the traditional aerospace supplier base Intel and AMD both know well. It is also a reason why we believe the historically slow, government-engineering driven qualification model for space hardware is about to be accelerated by SpaceX requirements in the coming years.
Qualcomm's position, by contrast, remains firmly at the connectivity layer rather than the compute layer. Snapdragon Satellite and its Skylo-certified modems address messaging and connectivity, a genuinely different problem than onboard AI inference, and nothing in Qualcomm's current roadmap suggests that changes soon. This is an example point that space is about more than AI compute, rock-solid chips for communications and positioning are still absolutely a requirement.
Mirroring the wider semiconductor industry, domestic manufacturing is becoming a shared talking point across this field rather than a single vendor's edge. Intel markets Starfire as manufactured in the United States for the U.S. Government. BAE's Endura tells the same story from the incumbent side. That chip is built on GlobalFoundries' 45nm platform at GF's Fab 8 in Malta, New York, with final assembly and test handled at BAE's Manassas, Virginia facility, a U.S. Department of War Category 1A Trusted Source. AMD's fab location for its own space-grade Versal XQR line is less publicized by comparison, worth watching as the domestic-sourcing conversation in aerospace and defense procurement continues to sharpen. Google adds a further contrast from outside the aerospace establishment entirely: Project Suncatcher aims to fly Trillium TPU chips in a satellite constellation, with prototype launches targeted for early 2027. Those chips are fabricated by TSMC in Taiwan, the same as the rest of Google's TPU line, a notably different supply chain posture than the domestic-manufacturing story Intel and BAE are both telling. Taken together, the AI accelerator, not the general-purpose flight computer, looks increasingly like the next orbital compute battleground, and the field competing for it now spans both trusted-source domestic suppliers and chips fabricated well outside that framework.
Looking Ahead
Based on what we are observing, the story to track through the back half of 2026 is qualification data, not spec sheets. Intel's Starfire samples arrive in the third quarter, and the radiation results that follow will determine whether 18A's design-level hardening actually offsets the smaller-node vulnerability it was built to manage. AMD's XQRVC1902 is expected to begin sampling in 2026, with flight-qualified versions following in 2027, giving the market a rough side-by-side timeline against Starfire's own maturation. We'll also be watching how much of Terafab's radiation-hardened chip ambition survives contact with reality. A program of that scale, if it materializes, would pull orbital AI compute into a competitive set that looks less like the traditional aerospace supply chain and more like the broader AI infrastructure buildout happening on the ground.
At the same time, we are also tracking Space Grade Linux, a Linux Foundation initiative currently hosted under the ELISA project with participants including Boeing, NASA, and EASA. That initiative is testing fault injection techniques to validate radiation resistance in software rather than relying solely on hardened silicon. There is a solid legacy here from the HPE platform on ISS. As that approach matures, it offers an additional path to reliability alongside Starfire and Versal, one where software absorbs more of the fault-tolerance burden as node sizes shrink and in-built hardening gets harder to guarantee.
For CIOs and space-systems buyers alike, the practical question isn't which chip node wins first, it's which qualification data arrives first and holds up, evolving software tolerance for space environments, and increasingly, where each chip was actually made.
Stephen Sopko | Analyst-in-Residence – Semiconductors & Deep Tech
Stephen Sopko is an Analyst-in-Residence specializing in semiconductors and the deep technologies powering today’s innovation ecosystem. With decades of executive experience spanning Fortune 100, government, and startups, he provides actionable insights by connecting market trends and cutting-edge technologies to business outcomes.
Stephen’s expertise in analyzing the entire buyer’s journey, from technology acquisition to implementation, was refined during his tenure as co-founder and COO of Palisade Compliance, where he helped Fortune 500 clients optimize technology investments. His ability to identify opportunities at the intersection of semiconductors, emerging technologies, and enterprise needs makes him a sought-after advisor to stakeholders navigating complex decisions.